Apple Macintosh Portable Processor-Direct Slot (PPDS) connector pinout |
layout |
96 pin Euro-DIN connector at the motherboard |
D0-D15Unbuffered data bus, bits 0 through 15 A1-A23Unbuffered address bus, bits 1 through 23 16M16 MHz clock /EXT.DTACKExternal data transfer acknowledge. This signal is an input to the processor logic glue. Assertion delays external generation of the /DTACK signal. EE(enable) clock /BERRBus error signal generated whenever /AS remains low for more than about 250 us. /IPL0-/IPL2Input priority level lines 0 through 2. /SYS.RSTInitiates a system reset. /SYS.PWRA signal from the Power Manager indicated that associated circuits should tri-state their outputs and go inte idle state; /SYS.PWR is pulled high (deasserted) during sleep state. /ASAddress strobe /UDSUpper data strobe /LDSLower data strobe R/WDefines bus transfer as read or write signal /DTACKData transfer acknowledge /DELAY.CSIndicates that a wait state is inserted into the current memory cycle and that you can delay a CS. /BGBus grant /BGACKBus grant acknowledge /BRBus request /VMAValid memory access /VPAValid peripheral address FC0-FC2Function code lines 0 through 2 +5/0VProvides +5V when the system is running normally and 0V when the system is in sleep mode. +5/3.7VProvides +5V when the system is running normally and 3.7V when the system is in sleep mode.
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Pinouts.ru > Pinouts of different motherboard slots > Pinout of Apple Macintosh Portable Processor-Direct Slot (PPDS) connector and layout of 96 pin Euro-DIN connector Source(s): Technote HW12: Macintosh Portable PDS Development at Apple Technical Notes, from Hardware Book | unknown | |
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